Journal of Emerging Trends in Engineering and Applied Sciences: Research Areas

Abstract:
In this paper, an ultra low power 15-bit digitally controlled oscillator is proposed. The proposed DCO is designed based on a segmental coarse-tuning stage and employs hysteresis delay cell (HDC) and digitally controlled varactor (DCV) in the fine-tuning stage. The proposed circuit has a simple structure, and the power consumption of this design is very low. Simulation of proposed DCO using TSMC 180nm model achieves controllable frequency range of 205MHz ~ 925MHz with a wide linearity. Monte Carlo simulation demonstrates that the time-period jitter due to random power supply fluctuation is under 90 ps and the power consumption is 255uW at 205MHz with 1.8V power supply.

Keywords: digitally controlled oscillator (DCO); low power; resolution; linearity; jitter

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